There is an ever-increasing demand on mobile
wireless operators to provide voice and high-speed data services. At the same
time, operators want to support more users per basestation in order to reduce
overall network cost and make the services affordable to subscribers. As a
result, wireless systems that enable higher data rates and higher capacities
have become the need of the hour. Smart Antennas technology attempts to address
this problem via advanced signal processing techniques called Beamforming. This
promising new technology has already found its way into all the major wireless standards
including 3GPP, 3GPP2, IEEE 802.16 and IEEE 802.11 systems. This article
provides an overview of this exciting technology and describes how Altera FPGAs
help address the major implementation challenges, including the need for
flexibility and processing speed.
Since the available broadcast spectrum is
limited, attempts to increase traffic within a fixed bandwidth create more
interference in the system and degrade the signal quality.
In particular, when omni-directional antennas
[see part (a) of Figure 1] are used at the basestation, the
transmission/reception of each user’s signal becomes a source of interference
to other users located in the same cell, making the overall system interference
limited. An effective way to reduce this type of interference is to split up
the cell into multiple sectors and use sectorized antennas, as shown in part
(b) of Figure 1.
Figure
1.
Non-Smart Antennas System

Smart antennas technology offers a significantly
improved solution to reduce interference levels and improve the system
capacity. With this technology, each user’s signal is transmitted and received
by the basestation only in the direction of that particular user. This
drastically reduces the overall interference in the system. A smart antennas
system, as shown in Figure 2, consists of an array of antennas that together
direct different transmission/reception beams toward each user in the system.
This method of transmission and reception is called beamforming and is made
possible through smart (advanced) signal processing at the baseband.
Figure
2.
Smart Antennas System—Beamforming

In beamforming, each user’s signal is
multiplied with complex weights that adjust the magnitude and phase of the
signal to and from each antenna. This causes the output from the array of
antennas to form a transmit/receive beam in the desired direction and minimizes
the output in other directions.
If the complex weights are selected from a
library of weights that form beams in specific, predetermined directions, the
process is called switched beamforming. Here, the basestation basically
switches between the different beams based on the received signal strength
measurements. On the other hand, if the weights are computed and adaptively
updated in real time, the process is called adaptive beamforming. Through
adaptive beamforming, the basestation can form narrower beams towards the
desired user and nulls towards interfering users, considerably improving the
signal-to-interference-plus-noise ratio.
The high-performance digital signal
processing (DSP) blocks, embedded Nios II® processors, and
logic elements (LEs) of Altera’s Stratix® II FPGAs make
them ideal for adaptive beamforming applications. This section describes the
Altera® implementation of a Rake-Beamformer (also known as
two-dimensional Rake) structure that performs joint space-time
processing. As illustrated in Figure 3, the signal from each receive
antenna is first down-converted to baseband, processed by the matched
filter-multipath estimator, and accordingly assigned to different Rake fingers.
Figure
3.
Adaptive Beamforming with Altera’s Stratix II FPGA

The beamforming unit on each Rake finger then
calculates the corresponding beamformer weights and
channel estimate using the pilot symbols that have been transmitted through the
dedicated physical control channel (DPCCH). The QRD-based recursive least
squares (RLS) algorithm is selected as the weight update algorithm for its fast
convergence and good numerical properties. The updated beamformer
weights are then used for multiplication with the data that has been
transmitted through the dedicated physical data channel (DPDCH). Maximal ratio
combining (MRC) of the signals from all fingers is then performed to yield the
final soft estimate of the DPDCH data.
The beamforming unit implementation on each Rake
finger is further elaborated below.
Complex Weight
Multiplications using DSP Blocks
The application of complex weights to the
signals from different antennas involves complex multiplications that map well
onto the embedded DSP blocks available in Stratix II devices. Each DSP
block can be operated at more than 370 MHz and has a number of multipliers,
followed by adder/subtractor/accumulators, in addition to registers for
pipelining. With these features, Stratix II devices can efficiently implement
complex multiplications and reduce the amount of overall logic and routing
required in beamforming designs.
CORDIC-Based QR
Decomposition
The QRD-RLS weights update algorithm involves
decomposing the input signal matrix Y
into QR, where Q is a unitary matrix and R is an upper triangular matrix. This
is achieved using a triangular systolic array of CORDIC blocks, as shown in
Figure 4. Each CORDIC block operates in either vectoring or rotating modes and
performs a series of micro rotations through simple shift and add/subtract
operations and can run at speeds of 300 MHz.
Figure
4. Triangular Systolic Array Example for CORDIC-Based QRD-RLS

The R
matrix and u vector
(transformed reference signal vector d)
are recursively updated for every new row of inputs entering the triangular
array. The triangular systolic array can be further mapped into a linear array
with reduced number of time-shared CORDIC blocks—as illustrated in Figure
4—providing a trade-off between resource consumption and throughput.
Back Substitution
for Weights Using Nios
The final beamformer
weights vector w is
related to the R and u outputs of the triangular array as Rw=u. Because R is an upper triangular matrix, w can be solved using a procedure
called back substitution that can be implemented in software on the flexible
embedded Nios processor. The Nios soft processor is capable of operating at
over 150 MHz on Stratix II FPGAs and can also utilize custom instructions
for hardware acceleration of program code. For an example eight antennas
system, the beamformer weights for a Rake finger can
be solved via back substitution in approximately 0.2 ms using the Nios
operating at 100 MHz. The computation time can be lowered to 3 µs by implementing the back substitution on a hardware
peripheral controlled by the Nios processor. Moreover, the Nios processor
offers a flexible platform to implement other adaptive weight update algorithms
such as least mean squares (LMS) and normalized LMS.
Processing Speed
Smart antennas technology
requires high processing bandwidth, with computational speeds approaching
several billion multiply and accumulate (MAC) operations per second.
Such computationally demanding applications quickly exhaust the processing
capabilities of digital signal processors. Altera FPGAs, with enhanced DSP
blocks and TriMatrix™ memory, provide throughputs in excess of 50 GMACs, offering a high-performance platform for beamforming
applications.
Flexibility
There are a number of beamforming
architectures and adaptive algorithms that provide good performance under
different scenarios such as transmit-receive adaptive beamforming and
transmit-receive switched beamforming. With embedded Nios processors and
easy-to-use development tools such as DSP Builder and SOPC Builder, Altera
FPGAs offer a high degree of flexibility in implementing various adaptive
signal processing algorithms.
Lower Risk
The standards for next-generation networks
are continuously evolving, and this creates an element of risk for beamforming
ASIC implementation. Transmit beamforming, for
example, utilizes the feedback from the mobile terminals. The number of bits
provided for feedback in the standards can determine the beamforming algorithm
that is used at the basestation. Moreover, future
basestations are likely to support transmit diversity including space-time
coding and multiple input multiple output (MIMO) technology. Because Altera
FPGAs are remotely upgradeable, they reduce the risk involved with
designing for evolving industry standards while providing the option for
the gradual deployment of additional transmit diversity schemes.
Cost Reduction Path
Mobile wireless service providers would
likely deploy smart antennas technology initially at certain “hot spots”— such
as densely populated urban areas—where there is more demand for high-speed
wireless data services. The high non-recurring engineering (NRE) costs and long
development cycles associated with ASICs cannot be
justified for such low volume requirements. Along with a significant
time-to-market advantage over ASICs, Altera's HardCopy® devices
offer a conversion process that supports the high-density Stratix II,
Stratix, and APEX™ families and can offer up to 70 percent cost
reduction for relatively low minimum order quantities (MOQs).