Linear Distortion Compensation Power Amplifiers Using Enhancement Mode PHEMT for Superior WiFi and WiMAX Performance

Henrik Morkner, Michael Vice Avago Technologies Inc.

This paper describes several enhancement mode PHEMT monolithic integrated power amplifiers that employ analog distortion compensation to greatly improve power efficiency for WiFI and WiMAX applications. The technique uses two stages with complementary distortion to provide linear power well beyond conventional saturation limits. For WiFi 802.11abg applications the power amplifier provides fully matched 26dB gain with 25dBm of saturated power. In the 802.11bg 2.4GHz transmit mode the MMIC gives over 20dBm linear power out under 54Mbps OFDM, at -26dB EVM, while drawing only 130mA of peak current. In the 802.11a 5-6 GHz transmit mode the MMIC gives over 20dBm linear power out under 54 Mbps OFDM, at -25dB EVM while drawing 150mA of peak current. For WiMAX applications a different MMIC can provide 30dB of matched gain yet deliver over 25dBm of power out and 4% EVM. All amplifiers have integrated control functions for power down and mode select. In addition directional couplers and temperature compensated power detection are integrated. This is the highest integration and performance level combination known to be published for WiFi and WiMAX application-specific integrated circuits.

Introduction:

As WiFi and WiMAX volumes grow year to year there is increasing pressure to integrate more functionality into an integrated circuit. Higher integration allows costs to decrease and creates smaller modules as needed for new 802.11n MIMO multiple transceivers and combined 802.16e WiMAX transceivers. GaAs MMICs in class A or class A/B operation have been the dominant technology for linear power amplifiers. These are effective but not very DC power to RF power efficient. As power levels increase (as in WiMAX) or applications become more mobile (computer and PDAs), current efficiency demands more clever solutions. This paper describes special distortion compensation techniques employed to lower DC current yet attain better linearity than ICs available in the market.

The MMICs described in this paper use enhancement mode PHEMT technology. All functions are integrated into one chip including; triple gate switches; distortion compensated linear power amplifiers; bias circuitry;  power down logic; linearity select logic; and directionally coupled power detection circuitry absolutely referenced to 0.3V and compensated for temperature and load. The MMIC has been designed, fabricated, and measured. Data is shown for the MMIC performance, although ultimately the MMIC will be used in a Front End Module with filters.      

 

Figure 1. A dual band linear amplifier for 802.11abgn

 

 

MMIC Process and CAD Tools

Avago technologies E-mode PHEMT (E-PHEMT) process uses a double etched recessed 0.25μm gate. The device has an Ft of 45 GHz, and Fmax of 65 GHz at Vds=2V, Vgs=0.7V. DC parameters for the device are shown in Table 1. The EPI material is targeted for power and breakdown with some compromises for noise. A Ti/Pt/Au T-gate is used for low input resistance and high-reliability. The process is designed to operate with a DC drain voltage up to 5.5V. All steps are defined using stepper lithography on 6-inch wafers. The MMIC process is equipped with passive components which include a 213Ω/ bulk resistor, 0.39 fF/mm MIM capacitor, backside via and two metal layers.

 

 

Parameter

Mean

Gm (mS/mm)

580

Vgs @ peak  Gm (V)

0.7

Ids @ peak Gm (mA/mm)

171

Imax (mA/mm) @Vgs=Vto

331

BVgd @ 1mA/mm (V)

-17

Vto @1mA/mm (V)

0.97

Vth @1mA/mm (V)

0.25

 Table 1. DC Parameters for the E-PHEMT

 


Amplifier Design

 

 

Figure 2. Topology of a distortion compensation amplifier

 

 

The power amplifiers are three stages each, a cascode driver followed by a common source output stage as shown in figure 2.  This arrangement has been demonstrated by Avago Technologies to take advantage of the respective limitations of each stage and to provide a complementary improvement to linearity. The first gain stage is a cascade structure which exhibits an opposite distortion characteristic (both AM-AM and AM-PM) to the following common source stage.  This technique permits a lower quiescent current to be used in the common source stage which results in better PAE at mid-range output power.  An integrated shunt L – series C – shunt C – series L matching network presents the correct impedance load to the first stage.  The common source second stage amplifies the signal further and drives the integrated matching network.  Integrating the matching network enables bonding off-chip at higher impedance thus reducing the undesirable effects of the wire bond series inductance.Figures 3 and 4 demonstrate this effect through schematics and simulated performance. Here one can see that as one stage goes into distortion, the other compensates. The amount of distortion and counter distortion of each stage is greatly affected by the bias and load conditions.

 

The bias network switches the linear power amplifiers on and off and establishes the optimum bias condition for the gain stages.  Here, the logic input voltages are conditioned to minimize the PA performance variation across the logic voltage range. In addition the bias circuitry is designed to track with temperature and process variation allowing a full volume manufacturable product rather than a laboratory curiosity.

 

The output power reporting circuit includes an integrated directional coupler and detector.  The power detector is composed of three stages: a directional coupler, a gain amplifier, and a detector.  The directional coupler ensures that the detector neglects the reverse traveling wave so that available power is reported regardless of match.  The amplifier provides necessary gain and reverse isolation.  The latter is helpful in preventing detector generated distortion from emerging at the antenna port.  The detector is configured to produce a dc voltage which is equal to the envelope peak.

 

 

 


Figure 3. AM-to-PM distortion correction

 

 

     

   

Figure 4. AM-to-AM distortion correction

 

 

 Several WiFi and WiMAX MMICs were fabricated as shown in Figure 5 and 6. Not only are all RF elements incorporated into the design as described, but all DC logic ports have built in ESD protection circuitry. 

 


Figure 5. A dual band 802.11abgn linear amplifier photograph that uses distortion compensation.

      

  

Figure 6. A 2.3-2.7 GHz WiMAX linear power amplifier using distortion compensation

 

 


Figure 7. Gain, Po, and EVM vs. Pin of the 2.4GHz PA

 

Results

 

The linear distortion compensation power amplifier MMICs are mounted chip-on-board for evaluation before being assembled into a complete FEM. The data shown are the individual bands and function of the chip only.Perhaps the most dramatic demonstration of distortion compensation is shown in figure 8. Here one can clearly see the EVM distortion measure versus power output. The red line indicates a “normal” class AB amplifier increase in EVM as output power is increased. However, the other colored lines show that when distortion compensation is employed in a linear amplifier, the EVM actually gets better as output power increases. DC current draw is the same for both cases (not shown), but the data clearly shows distortion can be compensated for.Linear Power Amplifier 2.4 GHz “Low Band” performance is shown in Figures 9 and 10. The typical gain is a +/-0.1dB flat 26dB with better than -15dB Return Loss (not shown).  The amplifier is able to develop over 17dBm of power with under -33dB EVM while drawing only 103mA peak current (52mA quiescent). It passes all 802.11g spectral emissions masking at 20.37 power output. Typical Gain, Power out, and EVM are shown verses input power in Table 2

    

 

 

 

 

Figure 8. EVM vs. Power out with and without distortion compensation.

 

 

 

Figure 9. Gain and Return Loss of a linear distortion compensation amplifier in a WLAN application.

 

 

 

      

  

Figure 10. Linear distortion compensation power amplifier meets all 802.11g spectral mask emissions at 20dBm Po

 


The Linear Power Amplifier 4.9-5.9 GHz “High Band” performance is similar to the low band performance. Some performance compromises have been made because of its wide bandwidth. The typical gain is a +/-0.5dB flat 27dB with better than -12dB Return Loss (not shown).  The amplifier is able to develop over 17dBm of power with under -27dB EVM while drawing only 111 mA peak current (65 mA quiescent). It also passes all 802.11a spectral emissions masking at 20dBm power output. Both Linear Power Amplifiers have integrated 20dB directional power detector couplers that provide a 0.3 to 1.0V power detection voltage independent of mismatch and temperature. All power and low noise amplifiers have CMOS compatible power down controls that give less than 10uA leakage current.

  

Conclusion

 

A distortion compensation technique for linear amplifiers has been demonstrated and is applicable to WiFi and WiMAX applications. The technique does not prevent distortion, but rather compensates for it with an analog technique. The technique was applied to a two stage designed fabricated in enhancement mode PHEMT. Here data clearly shows that distortion actually decreases with increase of output power, rather than the converse normally true in class AB amplifiers.

Specific results were shown for a 2.4 GHz WLAN 802.11g amplifier for WiFi applications. This is the only analog distortion compensation technique known to be published or patented for WiFi and WiMAX applications using enhancement mode PHEMT. The author wishes to thank Agilent and Avago for funding this research.

 

References

 

[1]      H.Morkner, et.al "A Complete Antenna-to-CMOS 4x6mm Front End Module for Dual Band 802.11abgn WLAN", IEEE 2007 International Microwave Symposium, Honolulu, HI, USA

 

[2]      H. Morkner et.al. “Single Chip 802.11abgn Enhancement Mode PHEMT MMIC with dual LNAs, Switches, and Distortion Compensation Power Amplifiers”, IEEE 2007 RFIC Symposium, Honolulu, HI, USA

 

[3]      S.Kumar, M.Vice, H.Morkner, W.Lam, "Enhancement mode GaAs PHEMT LNA with linearity Control(IP3) and Phase matched Mitigated Bypass Switch with Differential Active Mixer," IEEE 2003 International Microwave Symposium,

 

[4]      H.Morkner, M.Frank, S.Yajima, "A Miniature PHEMT Switched-LNA for 800MHz to 8 GHz Handset Applications", IEEE 1999 RFIC Symposium, June 1999, Session TUE1-2

 

[5]      K.Fujii, H.Morkner, E.Brown, "A Novel Low Cost Enhancement Mode Power Amplifier MMIC in SMT Package for 7 to 18 GHz Applications", 2004 European Microwave Conference, Oct 2004,  GAAS/EuM