| Network Processors: A Flexible, Scalable Solution for the Multi-Radio Basestation
René Torres, Mike Lewin, Peter Carlston Wireless Infrastructure Marketing Intel Corporation
The increasing convergence of wireless and internet technologies combined with the worldwide growth of wireless subscribers has driven the emergence of several diverse networking standards; GSM, EDGE, CDMA2000, WCDMA, and IEEE 802.16x for WiMAX for example. Each of these standards has in turn increased the need for greater throughput, performance, and flexibility requirements on tomorrow's next generation basestation designs. Service Providers, for example are now very keen to deploy flexible equipment that enables them to support multiple types of traffic on the RAN as well as be able to upgrade their network to support emerging radio technologies through software-defined radio solutions.
Traditionally basestation manufacturers have had to design separate line cards, baseband cards, and control cards to accommodate these types of evolving technology standards. Designs were often developed on proprietary ASIC, and FPGA architectures which were typically used for one specific system component that often did not scale for reuse in sister designs. Manufacturers for example, want to look at ways to design multi-radio capabilities into their BTS designs to maximize their hardware and software design investment. Several manufacturers today for instance, offer multiple BTS product families based on each of the different radio standards as well as different transport implementations (TDM vs. ATM vs. IP). When possible, they are looking for the capability to develop on one common silicon and software environment that they can re-use across their product families that can evolve to support future technologies standards. In the UMTS world, for example, before R5, the 3GPP specified the use of ATM for transport. In 2001 the cost advantages of IP transport drove the adoption of the IP RAN standard using Point to Point Protocol. In a subsequent evolution, the basestation's baseband architecture complexity is likewise evolving to offer a multitude of radio spectrum standards such as R5, R7 (HSDPA, HSUPA) and possibly OFDM.
Network Processors Have Come of Age in the Basestation Today's Network Processors offer BTS developers a flexible re-programmable software-defined solution that can be re-used in multiple components of the basestation architecture. For example, today's BTS architecture typically consists of 4 primary functional modules: Radio Frequency module, Control module, Baseband module and Transport Module. Figure 1. shows the 4 basic building blocks of a typical basestation design.
Figure 1. 4 Basic Building Blocks of a Basestation
Figure 2. shows an example of how a network processor such as the Intel® IXP2350 network processor can be designed into a basestation line card using a software defined programming to support multiple transport protocol standards such as ATM RAN based AAL2, AAL5, and or IP RAN based PPP, ML-PPP, and MC-PPP. Under this example the Iub interface can then further be configured to connect to either a layer 1 T1/E1 LIU or OC3 PHY interface standard.
Figure 2. BTS Line card using the Intel® IXP2350 Network Processor
Figure 3. shows an example of how the same IXP2350 network processor can be designed into a baseband card. The microengines can be programmed by software to perform Layer 2 MAC functions in addition to the line interface functions shown in Figure 2. A powerful integrated Xscale® processor core supports sophisticated Uplink/Downlink Scheduling for emerging radio standards such as HSDPA, HSUPA, and Wi-MAX.
Figure 3. Wi-MAX Baseband/LIU Card <MAC Scheduler Processing
In addition to supporting multiple Transport and Baseband processing standards, Network Processors often offer a rich set of integrated features such as control plane processing and crypto acceleration. Manufacturers that are planning to implement common platform architecture are often also looking for new opportunities to minimize their design's bill of materials cost (BOM cost) as well as reduce design environment complexity. Figure 4. highlights for example how network processors like the Intel® IXP2350 network processor offer features like integrated security engines and control plane processors that can save BOM costs on a basestation module design.
Figure 4. Integrated benefits of the IXP2350 Network Processor
Intel® Internet Exchange Architecture (Intel® IXA)
Intel® IXA is an ideal reprogrammable packet processing architecture solution for designing transport, Layer 2 Baseband MAC HS, and control plane functions into next generation basestations. Intel IXA is based on programmable microengines, Intel XScale® technology and the Intel IXA Software Framework. Additional information on Intel IXA and the Intel network processor product line is available at the following:
Be sure to visit the Intel booth and attend Intel keynotes on WiMAX and Network Processor solutions in the BTS at The Basestation Conference 2005, on April 25-29th.
Intel and XScale are marks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
René Torres René Torres is a Wireless Market Development Engineer at Intel's Infrastructure Processor Division. René is responsible for defining and driving Intel® Architecture and Intel® Internet Exchange Architecture silicon platform solutions for 3G and WiMAX infrastructure equipment. René has held marketing roles in Wireless, VoIP and Storage market segments in addition to purchasing manager roles in supply-line management and materials procurement.
Peter Carlston Peter Carlston is the Wireless Platform Architect and a Staff Technical Marketing Engineer at Intel's Infrastructure Processor Division. He is currently the technical lead on both the Intel proof-of-concept multi-radio base station and the proof-of-concept RNC projects. He has held a wide variety of systems architecture and software engineering positions at Intel and Unisys.
Mike Lewin Mike Lewin is a Wireless Market Development Engineer under Intel's Infrastructure Processor Division. Mike holds a BA in Mathematics, and a MSc Systems Engineering. 30 years designing and building systems for data and telecommunications |
